Digital Electronics and Logic Design syllabus

Digital Logic families: Digital IC Characteristics; TTL: Standard TTL characteristics, Operation of TTL NAND gate; CMOS: Standard CMOS characteristics, operation of CMOS NAND gate; Comparison of TTL & CMOS. Signed Binary number representation and Arithmetic: Sign Magnitude, 1’s complement & 2’s complement representation, unsigned Binary arithmetic (addition, subtraction, multiplication, and division), subtraction using 2’s complement; IEEE Standard 754 Floating point number representations. Codes: Binary , BCD, octal, hexadecimal, Excess-3 , Gray code & their conversions

Logic minimization: Representation of truth-table, SOP form, POS form, Simplification of logical functions, Minimization of SOP and POS forms, don’t care Conditions. Reduction techniques: K-Maps up to 4 variables CLC design using SSI chips – Code converters, Half- Adder, Full Adder, Half Subtractor, Full Subtractor, n bit Binary adder Introduction to MSI functions & chips - Multiplexers (IC 74151 and IC 74153), Decoder / Demultiplexer (IC 74138), Binary adder (IC 7483). Design using MSI chips: BCD adder using IC 7483, Implementation of logic functions using IC 74153, IC 74151 & 74138.

Introduction to sequential circuits. Difference between combinational circuits and sequential circuits, memory element – latch. Flip- Flops: Design, truth table, excitation table of SR, JK, D, T flip flops. Study of flip flops with asynchronous and synchronous Preset & Clear, Master Slave configuration, conversion from one type to another type of flip flop. Study of flip flop ICs - 7473, 7474, 7476 Application of flip-flops – Bounce elimination switch, Counters- asynchronous, synchronous and modulo counters, Study of modulus n counter ICs- 7490 & their applications to implement mod counters

Architecture Sequential Logic Design Registers- Buffer register, shift register types - SISO, SIPO, PISO & PIPO, applications of shift registers - ring counter, twisted ring counter Basic design steps-State diagram, State table, State reduction, State assignment, Mealy and Moore machines representation Sequence generators using counters & sequence detector using Moore & Mealy model

Architecture Computer organization & computer architecture, organization, functions & types of computer units- CPU(typical organization ,Functions , Types), Memory ( Types & their uses in computer ), IO( types & functions) & system bus( Address, data & control , Typical control lines, Multiple-Bus Hierarchies ); Von Neumann & Harvard architecture; Instruction cycle state diagram Von Neumann Machine: Structure of IAS computer, Registers: PC,MAR,MBR,IR,AC,MQ,IBR and their roles Control unit : Control signals & typical organization of hard wired & micro programmed Control Unit.