Digital Electronics and Logic Design syllabus
MDM-221-CSE · Second Year Computer Science and Engineering, SPPU 2024 pattern. Every unit, the marks scheme, course outcomes and books, copied from the official syllabus PDF.
Unit-wise syllabus
Boolean Algebra and Simplification Techniques
6 hoursBoolean Algebra: Basic theorems and properties of Boolean algebra, DeMorgan’s rules. Signed Binary number representation: Signed Magnitude, 1’s complement and 2’s complement representation. Simplification Techniques: Sum of product and Product of sum form, Minimization of SOP and POS using K-map. Minimization of Boolean function using K-map (up to 4 variables).
Case Study: Design and Optimization of a Digital Temperature Control System
Combinational Logic Design
6 hoursAdders/Subtractors: Half Adder, Full Adder, Half Subtractor, Full Subtractor, Binary Adder (IC 7483), BCD adder, Look ahead carry generator. Code Converters: BCD, Excess-3, Gray code, Binary Code. Multiplexers and Demultiplexers, Comparators (2 bit).
Case Study :Design of a Binary Calculator for BCD Input and 2’s Complement Operations
Sequential Circuits
6 hoursFlip-Flops: SR, JK, D, T; Preset &Clear, Master Slave JK Flip Flops, Truth Tables and Excitation tables, Conversion from one type to another type of Flop Flop. Registers: Registers: SISO, SIPO, PISO, PIPO, Shift Registers Counters: Ring Counter, BCD Counter, Johnson Counter.
Case study: Design of a Digital Stopwatch Using Flip-Flops, Registers, and Counters
Algorithmic State Machines and Logic Families
6 hoursAlgorithmic State Machines: Finite State Machines (FSM) and ASM, ASM charts, notations, construction of ASM chart and realization for sequential circuits. Logic Families: Classification of logic families: Unipolar and Bipolar Logic Families, Characteristics of Digital ICs: Fan-in, Fan-out, Current and voltage parameters, Noise immunity, Propagation Delay, Power Dissipation, Figure of Merits, Operating Temperature Range, power supply requirements. Introduction to TTL & CMOS, Comparison between TTL and CMOS
Case study : Vending Machine Controller using Algorithmic State Machines
Programmable Logic Devices
6 hoursPLDS: PLD, ROM as PLD, Programmable Logic Array (PLA): Implementation procedure, Construction and working, Advantages over read only memory and applications, Programmable Array Logic (PAL): Architecture, Programming PAL’s, construction and working, Designing combinational circuits using PLDs.
Case study: Traffic Light Control System Using PLD
Marks and credits
| Head | Marks | Credit |
|---|---|---|
| CCE (continuous comprehensive evaluation) | 40 | 2 |
| End-semester exam | 60 |
Prerequisite: Basic Electronics Engineering (ESE-101-ETC), if any.
Course outcomes
- CO1Understand and apply key concepts of Boolean algebra, binary number systems and simplification techniques for Boolean functions.
- CO2Study the design and operation of combinational circuits in digital systems.
- CO3Understand and apply the design and operation of various sequential circuits in digital systems.
- CO4Understand the design and implementation of FSMs and ASMs for sequential circuits, and study logic families.
- CO5Explore the fundamentals and applications of programmable logic devices (PLDs) in digital circuit design
Books
Text books
- Modern Digital Electronics by R.P.Jain, 4th Edition, ISBN 978-0-07-06691-16 Tata McGraw Hill
- Digital Logic and Computer Design by Moris Mano, Pearson , ISBN 978-93-325-4252-5
Reference books
- John F. Wakerly, "Digital Design: Principles and Practices," Pearson.
- Mark Bach, “Complete Digital Design”, Tata MCGraw Hill, 2005.
- Charles H. Roth Jr., "Fundamentals of Logic Design," Cengage Learning.
NPTEL and SWAYAM links
Listed in the official syllabus:
FAQ
How many units are in Digital Electronics and Logic Design?
Digital Electronics and Logic Design (MDM-221-CSE) has 5 units and 30 hours of theory: Unit I Boolean Algebra and Simplification Techniques (6 h); Unit II Combinational Logic Design (6 h); Unit III Sequential Circuits (6 h); Unit IV Algorithmic State Machines and Logic Families (6 h); Unit V Programmable Logic Devices (6 h).
What is the marks scheme for Digital Electronics and Logic Design?
The official Computer Science and Engineering 2024 pattern syllabus lists continuous comprehensive evaluation (CCE) for 40 marks and the end-semester exam for 60 marks, for 2 credits.
What should I know before Digital Electronics and Logic Design?
Prerequisite listed in the syllabus: Basic Electronics Engineering (ESE-101-ETC), if any.