Computer Organization and Microprocessor syllabus
PCC-253-CSE · Second Year Computer Science and Engineering, SPPU 2024 pattern. Every unit, the marks scheme, course outcomes and books, copied from the official syllabus PDF.
Unit-wise syllabus
Computer Evolution and Performance
6 hoursA Brief History of Computers, Von Neumann Architecture, Harvard Architecture, Designing for Performance, Evolution of Intel processor architecture- 4 bit to 64 bit, performance assessment. A top level view of Computer function and interconnection Computer Components, Interconnection structure, bus interconnection, Computer Arithmetic- The Arithmetic and Logic Unit, addition and subtraction of signed numbers, design of adder and fast adder, carry look ahead addition, multiplication of positive numbers, signed operand multiplication, Booths algorithm for multiplying binary integers.
Case Study: Evolution (Brief History) of Microprocessors
Memory Management
6 hoursCharacteristics of Memory System, The memory hierarchy. Cache Memory- Cache memory principles, Elements of cache design cache address, size, and mapping functions. Replacement algorithms, write policy, line size, number of cache, one level and two level cache. Performance characteristics of two level cache- locality & operations. Internal Memory- semiconductor main memory, advanced DRAM organization. External Memory- Hard Disk organization. RAID- level 1 to level 6.
Case Study : Memory Management in ATMs
Introduction to 8086 Microprocessor
6 hours8086 Architecture: Introduction to 16 bit microprocessor, Architecture and Pin diagram of 8086, Programmers model of 8086 (Registers). Addressing modes of 8086: Immediate Addressing, Register Addressing, Direct Addressing, Indirect Addressing, Indexed Addressing, Based Addressing, Based Indexed Addressing Instruction set of 8086: Data Movement Instructions, Arithmetic Instructions, Logic Instructions, Control Transfer Instructions, String Instructions, Input / Output Instructions, Flag Control Instructions, Process Control Instructions, Other Instructions.
Case study: Design of Basic Calculator Using 8086
Memory Organization and Interrupts
6 hoursMemory Organization: Segmentation, logical to physical address translation, even and odd memory banks, Read write cycle timing diagrams, Address mapping and decoding, I/O: memory mapped I/O & I/O Mapped I/O. Interrupts: Interrupt Control & status registers, Interrupt Vector Table (IVT), ISR, Hardware and software Interrupts, 8259 (Programmable Interrupt Controller): Features, Block Diagram, Control & Status registers.
Case study : Memory and Interrupt Management in an Automated Railway Reservation System
Parallel Organization
6 hoursMultiprocessors, Clusters, Flynn’s Taxonomy for Multiple Processor Organizations, Closely and Loosely Coupled Multiprocessors Systems, Symmetric Multiprocessor (SMP) Organization, UMA, NUMA. RISC: Instruction execution characteristics, use of large register file, compiler-based register optimization, RISC architecture and pipelining. RISC Vs CISC.
Case study:Multi-core System
Marks and credits
| Head | Marks | Credit |
|---|---|---|
| CCE (continuous comprehensive evaluation) | 40 | 2 |
| End-semester exam | 60 |
Prerequisite: Digital Electronics and Logic Design.
Course outcomes
- CO1Understand and analyze computer system design and historical development of computers and foundational architectures like Von Neumann and Harvard.
- CO2To design and optimize internal, and external memory systems for high-performance computing.
- CO3To understand fundamental knowledge of the 8086-microprocessor architecture, programming model, addressing modes, and instruction set.
- CO4To understand memory management, I/O operations and interrupt handling, including address translation, memory banks and interrupt controllers.
- CO5To explore the multiprocessor systems, Flynn’s Taxonomy and RISC design principles, including memory architectures
Books
Text books
- W. Stallings, Computer Organization and Architecture: Designing for performance, Pearson Education/ Prentice Hall of India, 2003, ISBN 978-93-325-1870-4, 7 th Edition.
- Zaky S, Hamacher, Computer Organization, 5th Edition, McGraw-Hill Publications, 2001, ISBN- 978-1-25-900537-5, 5th Edition.
- Douglas Hall, “Microprocessors & Interfacing”, McGraw Hill, Revised 2 Edition,
- A. Ray, K. Bhurchandi, “Advanced Microprocessors and peripherals: Arch, Programming & Interfacing” Tata McGraw Hill,2004 ISBN 0-07-463841.
Reference books
- John P Hays, Computer Architecture and Organization, McGraw-Hill Publication, 1998, ISBN:978-1-25-902856-4, 3rd Edition.
- Miles Murdocca and Vincent Heuring, Computer Architecture and Organization- an integrated approach, Wiley India Pvt. Ltd, ISBN:978-81-265-1198-3, 2nd Edition 55
- A. Tanenbaum, Structured Computer Organization||, Prentice Hall of India, 1991 ISBN: 81 – 203 – 1553 – 7, 4th Edition.
- Patterson and Hennessy, Computer Organization and Design, Morgan Kaufmann Publishers In, ISBN 978-0-12-374750-1, 4th Edition.
- Liu, Gibson, “Microcomputer Systems: The 8086/88 Family”, 2 nd Edition, PHI,2005.
- Kenneth Ayala, “The 8086 Microprocessor: Programming & Interfacing the PC”
NPTEL and SWAYAM links
Listed in the official syllabus:
FAQ
How many units are in Computer Organization and Microprocessor?
Computer Organization and Microprocessor (PCC-253-CSE) has 5 units and 30 hours of theory: Unit I Computer Evolution and Performance (6 h); Unit II Memory Management (6 h); Unit III Introduction to 8086 Microprocessor (6 h); Unit IV Memory Organization and Interrupts (6 h); Unit V Parallel Organization (6 h).
What is the marks scheme for Computer Organization and Microprocessor?
The official Computer Science and Engineering 2024 pattern syllabus lists continuous comprehensive evaluation (CCE) for 40 marks and the end-semester exam for 60 marks, for 2 credits.
What should I know before Computer Organization and Microprocessor?
Prerequisite listed in the syllabus: Digital Electronics and Logic Design.